Accelerating Boolean implications with FPGAs
- We present the FPGA implementation of an algorithm [4] that computes implications between signal values in a boolean network. The research was performed as a masterrsquos thesis [5] at the University of Frankfurt. The recursive algorithm is rather complex for a hardware realization and therefore the FPGA implementation is an interesting example for the potential of reconfigurable computing beyond systolic algorithms. A circuit generator was written that transforms a boolean network into a network of small processing elements and a global control logic which together implement the algorithm. The resulting circuit performs the computation two orders of magnitudes faster than a software implementation run by a conventional workstation.
Author: | Kolja Sulimma, Dominik Stoffel, Wolfgang Kunz |
---|---|
URN: | urn:nbn:de:hebis:30-25230 |
ISBN: | 3-540-66457-2 |
Document Type: | Article |
Language: | English |
Date of Publication (online): | 2006/03/21 |
Year of first Publication: | 1999 |
Publishing Institution: | Universitätsbibliothek Johann Christian Senckenberg |
Release Date: | 2006/03/21 |
Note: | auch in: Field Programmable Logic and Applications: 9th International Workshop, FPL99, Glasgow, UK, August 30 - September 1, 1999. Proceedings. Lecture Notes in Computer Science, Volume 1673, ISBN: 3-540-66457-2, Springer-Verlag |
Source: | Field Programmable Logic and Applications: 9th International Workshop, FPL99, Glasgow, UK, August 30 - September 1, 1999. Proceedings. Lecture Notes in Computer Science, Volume 1673, ISBN: 3-540-66457-2, © 2004 Springer-Verlag |
HeBIS-PPN: | 225887002 |
Institutes: | Informatik und Mathematik / Informatik |
Dewey Decimal Classification: | 0 Informatik, Informationswissenschaft, allgemeine Werke / 00 Informatik, Wissen, Systeme / 004 Datenverarbeitung; Informatik |
Licence (German): | Deutsches Urheberrecht |