FEATS - Framework for Explorative, Analog Topology Synthesis

The presented work inside this thesis aims to raise the degree of automation in analog circuit design. Therefore, a framework was developed to provide the necessary mechanisms in order to carry out a fully automated anal
The presented work inside this thesis aims to raise the degree of automation in analog circuit design. Therefore, a framework was developed to provide the necessary mechanisms in order to carry out a fully automated analog circuit synthesis, i.e., the construction of an analog circuit fulfilling all previously defined (electrical) specifications. Nowadays, analog circuit design in general is a very time consuming process compared to a digital design flow. Due to its discrete nature, the digital design process is highly automated and thus very efficient compared to analog circuit design. In modern Very-Large-Scale integration (VLSI) circuits the analog parts are mostly just a small portion of the overall chip area. Although this small portion is known to consume a major part of the needed workforce. Paired with product cycles which constantly get shorter, the time needed to develop the analog parts of an integrated circuit (IC) becomes a determinant factor. Apart from this, the ongoing progress in semiconductor processing technologies promises more speed with less power consumption on smaller areas, forcing the IC developers to keep track with the technology nodes in order to maintain competitiveness. Analog circuitry exhibits the inherent property of being hard to reuse, as porting from one technology node to another imposes critical changes for operating conditions (e.g., supply voltage) - mostly leading to a full redesign for most of the analog modules. This productivity gap between digital and analog design resembles the primary motivation for this thesis. Due to the availability of commercial sizing tools, this work deliberately focuses on the construction of circuit topologies in distinction to parameter synthesis, which can be obtained with a dedicated sizing tool. The focus on circuit construction allows the development of a framework which allows a full design space exploration. This thesis describes the needed concepts and methods to realize a deterministic, explorative analog synthesis framework. Despite this, a reference implementation is presented, which demonstrates the applicability in current analog design flows.
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Die in dieser Dissertation vorgestellten Arbeiten verfolgen das Ziel, den Grad der Automatisierung des Entwurfs von integrierten analogen Schaltungen zu erhöhen. Hierfür wurde ein Framework entwickelt, welches die benöti
Die in dieser Dissertation vorgestellten Arbeiten verfolgen das Ziel, den Grad der Automatisierung des Entwurfs von integrierten analogen Schaltungen zu erhöhen. Hierfür wurde ein Framework entwickelt, welches die benötigten Mechanismen bereitstellt, um eine voll automatisierte analoge Schaltungssynthese durchführen zu können, d.h. die Konstruktion einer analogen Schaltung, welche alle zuvor definierten (elektrischen) Spezifikationen erfüllt...
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Metadaten
Author:Markus Meissner
URN:urn:nbn:de:hebis:30:3-444205
Place of publication:Frankfurt am Main
Referee:Lars Herdrich, Helmut Gräb
Document Type:Doctoral Thesis
Language:English
Year of Completion:2016
Year of first Publication:2015
Publishing Institution:Universitätsbibliothek Johann Christian Senckenberg
Granting Institution:Johann Wolfgang Goethe-Universität
Date of final exam:2016/10/18
Release Date:2017/10/19
Pagenumber:xvi, 117
HeBIS PPN:418495785
Institutes:Informatik
Dewey Decimal Classification:004 Datenverarbeitung; Informatik
Sammlungen:Universitätspublikationen
Licence (German):License Logo Veröffentlichungsvertrag für Publikationen

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