TY  - JOUR
A1  - Sulimma, Kolja
A1  - Stoffel, Dominik
A1  - Kunz, Wolfgang
T1  - Accelerating Boolean implications with FPGAs
N2  - We present the FPGA implementation of an algorithm [4] that computes implications between signal values in a boolean network. The research was performed as a masterrsquos thesis [5] at the University of Frankfurt. The recursive algorithm is rather complex for a hardware realization and therefore the FPGA implementation is an interesting example for the potential of reconfigurable computing beyond systolic algorithms. A circuit generator was written that transforms a boolean network into a network of small processing elements and a global control logic which together implement the algorithm. The resulting circuit performs the computation two orders of magnitudes faster than a software implementation run by a conventional workstation.
Y1  - 2006
UR  - http://publikationen.ub.uni-frankfurt.de/frontdoor/index/index/docId/2881
UR  - https://nbn-resolving.org/urn:nbn:de:hebis:30-25230
SN  - 3-540-66457-2
N1  - auch in: Field Programmable Logic and Applications: 9th International Workshop, FPL99, Glasgow, UK, August 30 - September 1, 1999. Proceedings. Lecture Notes in Computer Science, Volume 1673, ISBN: 3-540-66457-2, Springer-Verlag
ER  -