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Towards new front-end electronics for the HADES drift chamber system

  • HADES (High Acceptance DiElectron Spectrometer), located at GSI, is a versatile detector for precise spectroscopy of e+ e- pairs and charged hadrons produced on a fixed target in a 1 to 3.5 AGeV kinetic beam energy region. The main experimental goal is to investigate properties of dense nuclear matter created in heavy ion collisions and learn about in-medium hadron properties. In the HADES set-up 24 Mini Drift Chambers (MDC) allow for track reconstruction and determining the particle momentum by exploiting charged particle deflection in a magnetic field. In addition, the drift chambers contribute to particle identification by measuring the energy loss. The read-out concept foresees each sensing wire to be equipped with a preamplifier, analog pulse shaper and discriminator. In the current front-end electronics, the ASD-8 ASIC comprises the above modules. Due to limitations of the current on-board time to digital converters (TDC), especially regarding higher reaction rates expected at the future FAIR facility (HADES at SIS-100), the electronics need to be replaced by new board featuring multi-hit TDCs. Whereas ASD-8 chips cannot be procured anymore, a promising replacement candidate is the PASTTREC ASIC, developed by JU Krakow, which was tested w.r.t. suitability for MDC read-out in a variety of set-ups and, where possible, in direct comparison to ASD-8. The timing precision, being the most crucial performance parameter of the joint system of detector and read-out electronics, was assessed in two different set-ups, i.e. a cosmic muon tracking set-up and a beam test at the COSY accelerator at Juelich using a minimum ionizing proton beam. The beam test results were reproduced and can thus be quantitatively explained in a three dimensional GARFIELD simulation of a HADES MDC drift cell. In particular, the simulation is able to describe the characteristic dependence of the time precision on the track position within the cell. A circuit simulation (SPICE) was used to closely model the time development of a raw drift chamber pulse, measured as a response to X-rays from a 55 Fe source. The insights gained from this model were used for attributing realistic charge values to the time over threshold values measured with the read-out ASICs in a charge calibration set-up. Furthermore, a high-level circuit simulation of the PASTTREC shaper is implemented to serve as a demonstration of the effect of the individual shaping and tail cancellation stages which are present in both ASICs.

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Author:Michael WiebuschORCiDGND
URN:urn:nbn:de:hebis:30:3-508443
Place of publication:Frankfurt am Main
Referee:Joachim StrothORCiD, Christoph BlumeORCiDGND
Advisor:Joachim Stroth
Document Type:Doctoral Thesis
Language:English
Date of Publication (online):2019/07/22
Year of first Publication:2019
Publishing Institution:Universitätsbibliothek Johann Christian Senckenberg
Granting Institution:Johann Wolfgang Goethe-Universität
Date of final exam:2019/07/17
Release Date:2019/07/25
Page Number:135
HeBIS-PPN:451110471
Institutes:Physik
Dewey Decimal Classification:5 Naturwissenschaften und Mathematik / 53 Physik / 530 Physik
Sammlungen:Universitätspublikationen
Licence (German):License LogoDeutsches Urheberrecht